Logic NOT Gate Tutorial

The standard NOT gate is given a symbol whose shape is of a triangle pointing to the right with a circle at its end. This circle is known as an “inversion ... X Registertodownloadpremiumcontent! Registertodownloadpremiumcontent! X Deutsch Polski Register LogIn ACCircuits Amplifiers Attenuators BinaryNumbers BooleanAlgebra Capacitors CombinationalLogic Connectivity Counters DCCircuits Diodes Electromagnetism Filters Inductors Input/OutputDevices LogicGates MiscellaneousCircuits OperationalAmplifiers Oscillator PowerElectronics PowerSupplies Premium RCNetworks Resistors Resources SequentialLogic Systems Transformers Transistors Uncategorized WaveformGenerators PremiumContent FurtherEducation Sitemap ContactUs Home / LogicGates / LogicNOTGateTutorial LogicNOTGateTutorial TheLogicNOTGateisthemostbasicofallthelogicalgatesandisoftenreferredtoasanInvertingBufferorsimplyanInverter InvertingNOTgatesaresingleinputdevicsewhichhaveanoutputlevelthatisnormallyatlogiclevel“1”andgoes“LOW”toalogiclevel“0”whenitssingleinputisatlogiclevel“1”,inotherwordsit“inverts”(complements)itsinputsignal.TheoutputfromaNOTgateonlyreturns“HIGH”againwhenitsinputisatlogiclevel“0”givingustheBooleanexpressionof:  A = Q. ThenwecandefinetheoperationofasingleinputdigitallogicNOTgateasbeing:   “IfAisNOTtrue,thenQistrue” TransistorNOTGate Asimple2-inputlogicNOTgatecanbeconstructedusingaRTLResistor-transistorswitchesasshownbelowwiththeinputconnecteddirectlytothetransistorbase.Thetransistormustbesaturated“ON”foraninvertedoutput“OFF”atQ.   LogicNOTGatesareavailableusingdigitalcircuitstoproducethedesiredlogicalfunction.ThestandardNOTgateisgivenasymbolwhoseshapeisofatrianglepointingtotherightwithacircleatitsend.Thiscircleisknownasan“inversionbubble”andisusedinNOT,NANDandNORsymbolsattheiroutputtorepresentthelogicaloperationoftheNOTfunction.Thisbubbledenotesasignalinversion(complementation)ofthesignalandcanbepresentoneitherorboththeoutputand/ortheinputterminals. TheLogicNOTGateTruthTable Symbol TruthTable InverterorNOTGate A Q 0 1 1 0 BooleanExpressionQ = notAorA ReadasinverseofAgivesQ   LogicNOTgatesprovidethecomplementoftheirinputsignalandaresocalledbecausewhentheirinputsignalis“HIGH”theiroutputstatewillNOTbe“HIGH”.Likewise,whentheirinputsignalis“LOW”theiroutputstatewillNOTbe“LOW”.Astheyaresingleinputdevices,logicNOTgatesarenotnormallyclassedas“decision”makingdevicesorevenasagate,suchastheANDorORgateswhichhavetwoormorelogicinputs.CommercialavailableNOTgatesIC’sareavailableineither4or6individualgateswithinasingleICpackage. The“bubble”(o)presentattheendoftheNOTgatesymbolabovedenotesasignalinversion(complementation)oftheoutputsignal.Butthisbubblecanalsobepresentatthegatesinputtoindicateanactive-LOWinput.ThisinversionoftheinputsignalisnotrestrictedtotheNOTgateonlybutcanbeusedonanydigitalcircuitorgateasshownwiththeoperationofinversionbeingexactlythesamewhetherontheinputoroutputterminal.Theeasiestwayistothinkofthebubbleassimplyaninverter. SignalInversionusingActive-lowinputBubble BubbleNotationforInputInversion NANDandNORGateEquivalents AnInverterorlogicNOTgatecanalsobemadeusingstandardNANDandNORgatesbyconnectingtogetherALLtheirinputstoacommoninputsignalforexample.   Averysimpleinvertercanalsobemadeusingjustasinglestagetransistorswitchingcircuitasshown. Whenthetransistorsbaseinputat“A”ishigh,thetransistorconductsandcollectorcurrentflowsproducingavoltagedropacrosstheresistorRtherebyconnectingtheoutputpointat“Q”togroundthusresultinginazerovoltageoutputat“Q“. Likewise,whenthetransistorsbaseinputat“A”islow(0v),thetransistornowswitches“OFF”andnocollectorcurrentflowsthroughtheresistorresultinginanoutputvoltageat“Q”highatavaluenearto+Vcc. Then,withaninputvoltageat“A”HIGH,theoutputat“Q”willbeLOWandaninputvoltageat“A”LOWtheresultingoutputvoltageat“Q”isHIGHproducingthecomplementorinversionoftheinputsignal. HexSchmittInverters AstandardInverterorLogicNOTGate,isusuallymadeupfromtransistorswitchingcircuitsthatdonotswitchfromonestatetothenextinstantly,therewillalwaysbesomedelayintheswitchingaction. Alsoasatransistorisabasiccurrentamplifier,itcanalsooperateinalinearmodeandanysmallvariationtoitsinputlevelwillcauseavariationtoitsoutputlevelormayevenswitch“ON”and“OFF”severaltimesifthereisanynoisepresentinthecircuit.OnewaytoovercometheseproblemsistouseaSchmittInverterorHexInverter. WeknowfromthepreviouspagesthatalldigitalgatesuseonlytwologicvoltagestatesandthatthesearegenerallyreferredtoasLogic“1”andLogic“0”anyTTLvoltageinputbetween2.0vand5visrecognisedasalogic“1”andanyvoltageinputbelow0.8visrecognisedasalogic“0”respectively. ASchmittInverterisdesignedtooperateorswitchstatewhenitsinputsignalgoesabovean“UpperThresholdVoltage”orUTVlimitinwhichcasetheoutputchangesandgoes“LOW”,andwillremaininthatstateuntiltheinputsignalfallsbelowthe“LowerThresholdVoltage”orLTVlevelinwhichcasetheoutputsignalgoes“HIGH”.InotherwordsaSchmittInverterhassomeformofHysteresisbuiltintoitsswitchingcircuit. Thisswitchingactionbetweenanupperandlowerthresholdlimitprovidesamuchcleanerandfaster“ON/OFF”switchingoutputsignalandmakestheSchmittinverteridealforswitchinganyslow-risingorslow-fallinginputsignalandassuchwecanuseaSchmitttriggertoconverttheseanaloguesignalsintodigitalsignalsasshown. SchmittInverter   AveryusefulapplicationofSchmittinvertersiswhentheyareusedasoscillatorsorsine-to-squarewaveconvertersforuseassquarewaveclocksignals. SchmittNOTGateInverterOscillator   ThefirstcircuitshowsaverysimplelowpowerRCtypeoscillatorusingaSchmittinvertertogenerateasquarewaveoutputwaveform.InitiallythecapacitorCisfullydischargedsotheinputtotheinverteris“LOW”resultinginaninvertedoutputwhichis“HIGH”.AstheoutputfromtheinverterisfedbacktoitsinputandthecapacitorviatheresistorRthecapacitorbeginstochargeup. Whenthecapacitorschargingvoltagereachestheupperthresholdlimitoftheinverter,theinverterchangesstate,theoutputbecomes“LOW”andthecapacitorbeginstodischargethroughtheresistoruntilitreachesthelowerthresholdlevelweretheinverterchangesstateagain.Thisswitchingbackandforthbytheinverterproducesasquarewaveoutputsignalwitha33%dutycycleandwhosefrequencyisgivenas:ƒ = 680/RC. Thesecondcircuitconvertsasinewaveinput(oranyoscillatinginputforthatmatter)intoasquarewaveoutput.Theinputtotheinverterisconnectedtothejunctionofthepotentialdividernetworkwhichisusedtosetthequiescentpointofthecircuit.TheinputcapacitorblocksanyDCcomponentpresentintheinputsignalonlyallowingthesinewavesignaltopass. Asthissignalpassestheupperandlowerthresholdpointsoftheinvertertheoutputalsochangesfrom“HIGH”to“LOW”andsoonproducingasquarewaveoutputwaveform.Thiscircuitproducesanoutputpulseonthepositiverisingedgeoftheinputwaveform,butbyconnectingasecondSchmittinvertertotheoutputofthefirst,thebasiccircuitcanbemodifiedtoproduceanoutputpulseonthenegativefallingedgeoftheinputsignal. CommonlyavailablelogicNOTgateandInverterIC’sinclude: TTLLogicNOTGates 74LS04HexInvertingNOTGate 74LS14HexSchmittInvertingNOTGate 74LS1004HexInvertingDrivers CMOSLogicNOTGates CD4009HexInvertingNOTGate CD4069HexInvertingNOTGate 7404NOTGateorInverter InthenexttutorialaboutDigitalLogicGates,wewilllookatthedigitallogicNANDGatefunctionasusedinbothTTLandCMOSlogiccircuitsaswellasitsBooleanAlgebradefinitionandtruthtables. PreviousLogicORGateTutorial NextLogicNANDGateTutorial ReadmoreTutorialsinLogicGates 1.DigitalLogicGates 2.LogicANDGateTutorial 3.LogicORGateTutorial 4.LogicNOTGateTutorial 5.LogicNANDGateTutorial 6.LogicNORGateTutorial 7.Exclusive-ORGateTutorial 8.Exclusive-NORGateTutorial 9.DigitalBufferTutorial 10.DigitalLogicGatesSummary 11.Pull-upResistors 12.UniversalLogicGates 64Comments JointheconversationCancelreplyError!Pleasefillallfields. Notifymeoffollow-upcommentsbyemail. Δ Oleksii ASchmittInverterisdesignedtooperateorswitchstatewhenitsinputsignalgoesabovean“UpperThresholdVoltage”||||Maybeit’sLowerThresholdVoltage??|||| checkplease PostedonAugust27th2021|10:00am Reply WayneStorr Arisingpositive-goinginputvoltage(+Vin)willcausetheoutputtochangestatewhenitreachestheupperthresholdvoltage(UTV)andchangebacktoitsoriginalstatewhenthefallingnegative-goinginputvoltage(-Vin)reachesthelowerthresholdvoltage(LTV).Thedifferencebetweenthetwoswitchingpointsiscalledhysteresis,Vh.Thenthetutorialiscorrectasgiven. PostedonAugust27th2021|1:23pm Reply Oleksii thanks,didn’treallyexpectforyoutoanswer PostedonAugust27th2021|3:16pm Reply xo ifRmeansresistanceandR2meansresistance*2thanIdon’tknowwhatamidoingwrong PostedonJune04th2021|9:27am Reply SharadTiwari Logicgatekyahai PostedonDecember15th2020|4:20am Reply Muhammadmuazu ConstructaNOTgate PostedonDecember07th2020|12:13am Reply अमिततिवारी Veryhelpfulforme,thanks PostedonJuly16th2020|5:05am Reply Nicholaschioke Please,howmanyvolts. PostedonApril13th2020|7:49pm Reply Hamid goodspeciallydiagramissoeasytounderstand PostedonJanuary26th2020|8:12pm Reply Said Verynicegohead PostedonOctober28th2019|8:26am Reply Rex Doesanyoneknowswhysometimeswehavebothnotgatesback-to-backtogether? PostedonOctober22nd2019|6:15pm Reply WayneStorr PleasetryreadingthetutorialaboutDataBusTransceivers PostedonOctober22nd2019|6:27pm Reply ayus hello,NOTgatecanbemadebyjoiningtwooutputsofXORgate.Explain. PostedonMay22nd2019|3:26am Reply Cary Tounderstand,youmustfirstlookatthetruthtableofaNORgate. XYF 001