CMOS three-input NOR3 gate - TAMS
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The three-input NOR3 gate uses three p-channel transistors in series between VCC and gate-output, and the complementary circuit of a parallel-connection of ... TAMS/Java/Hades/applets:contents|previous|nextHadesAppletscontentsvisual index introduction std_logic_1164 gatelevel circuits delay models flipflops adders and arithm... counters LFSR and selftest memories programmable logic state-machine editor misc. demos I/O and displays DCF-77 clock relays (switch-le... CMOS circuits (sw... inverter, bu... NAND, AND NAND3 NOR, OR NOR3 AOI22 comple... OAI31 comple... TRIBUF tri-s... TGATE TRIBUF (tgate) MUX21 (tgate) XOR (mux tgate) XOR (tgate) DLATCH (tgate) DLATCH (schema) DFF (tgate) DFF (schema) 6T-SRAM cell SRAM (4x1 bits) RTLIB logic RTLIB registers Prima processor D*CORE MicroJava Pic16 cosimulation Mips R3000 cosimu... Intel MCS4 (i4004) image processing ... [Sch04] Codeumsetzer [Sch04] Addierer [Sch04] Flipflops [Sch04] Schaltwerke [Sch04] RALU, Min... [Fer05] State-Mac... [Fer05] PIC16F84/... [Fer05] Miscellan... [Fer05] Femtojava FreeTTS CMOSthree-inputNOR3gate Theimageaboveshowsathumbnailofthe interactiveJavaappletembeddedintothispage. Unfortunately,yourbrowserisnotJava-aware orJavaisdisabledinthebrowserpreferences. Tostarttheapplet,pleaseenableJava andreloadthispage. (Youmighthavetorestartthebrowser.) CircuitDescription Thisappletdemonstratesthestatictwo-inputandthree-inputNORgates inCMOStechnology. Clicktheinputswitchesortypethe('a','b')and('c','d','e') bindkeystocontrolthegates. Thethree-inputNOR3gateusesthreep-channeltransistorsinseries betweenVCCandgate-output, andthecomplementarycircuitofaparallel-connectionofthreen-channel transistorsbetweenGNDandgate-output. NOR3 ABC|Y -----------+---- 000|1 001|0 010|0 011|0 100|0 101|0 110|0 111|0 Printversion| RunthisdemointheHadeseditor(viaJavaWebStart)Usage|FAQ|About|License|Feedback|Tutorial(PDF)|Referenzkarte(PDF,inGerman)Impressumhttp://tams.informatik.uni-hamburg.de/applets/hades/webdemos/05-switched/40-cmos/nor3.html
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