CMOS Gate Circuitry | Logic Gates | Electronics Textbook

A CMOS NOR gate circuit uses four MOSFETs just like the NAND gate, except that its transistors are differently arranged. Instead of two paralleled sourcing ( ... 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Field-EffectTransistors Field-effecttransistors,particularlytheinsulated-gatevariety,maybeusedinthedesignofgatecircuits.Beingvoltage-controlledratherthancurrent-controlleddevices,IGFETstendtoallowverysimplecircuitdesigns.Takeforinstance,thefollowinginvertercircuitbuiltusingP-andN-channelIGFETs:     Noticethe“Vdd”labelonthepositivepowersupplyterminal.Thislabelfollowsthesameconventionas“Vcc”inTTLcircuits:itstandsfortheconstantvoltageappliedtothedrainofafieldeffecttransistor,inreferencetoground.   FieldEffectTransistorsinGateCircuits LowInput Let’sconnectthisgatecircuittoapowersourceandinputswitch,andexamineitsoperation.PleasenotethattheseIGFETtransistorsareE-type(Enhancement-mode),andsoarenormally-offdevices. Ittakesanappliedvoltagebetweengateanddrain(actually,betweengateandsubstrate)ofthecorrectpolaritytobiasthemon.     TheuppertransistorisaP-channelIGFET.Whenthechannel(substrate)ismademorepositivethanthegate(gatenegativeinreferencetothesubstrate),thechannelisenhancedandcurrentisallowedbetweensourceanddrain. So,intheaboveillustration,thetoptransistoristurnedon.Thelowertransistor,havingzerovoltagebetweengateandsubstrate(source),isinitsnormalmode:off. Thus,theactionofthesetwotransistorsaresuchthattheoutputterminalofthegatecircuithasasolidconnectiontoVddandaveryhighresistanceconnectiontoground.Thismakestheoutput“high”(1)forthe“low”(0)stateoftheinput. HighInput Next,we’llmovetheinputswitchtoitsotherpositionandseewhathappens:     Nowthelowertransistor(N-channel)issaturatedbecauseithassufficientvoltageofthecorrectpolarityappliedbetweengateandsubstrate(channel)toturniton(positiveongate,negativeonthechannel).Theuppertransistor,havingzerovoltageappliedbetweenitsgateandsubstrate,isinitsnormalmode:off. Thus,theoutputofthisgatecircuitisnow“low”(0).Clearly,thiscircuitexhibitsthebehaviorofaninverter,orNOTgate. ComplementaryMetalOxideSemiconductors(CMOS) Usingfield-effecttransistorsinsteadofbipolartransistorshasgreatlysimplifiedthedesignoftheinvertergate.NotethattheoutputofthisgateneverfloatsasisthecasewiththesimplestTTLcircuit:ithasanatural“totem-pole”configuration,capableofbothsourcingandsinkingloadcurrent. Keytothisgatecircuit’selegantdesignisthecomplementaryuseofbothP-andN-channelIGFETs.SinceIGFETsaremorecommonlyknownasMOSFETs(Metal-Oxide-SemiconductorFieldEffectTransistor),andthiscircuitusesbothP-andN-channeltransistorstogether,thegeneralclassificationgiventogatecircuitslikethisoneisCMOS:ComplementaryMetalOxideSemiconductor. CMOSGates:ChallengesandSolutions CMOScircuitsaren’tplaguedbytheinherentnonlinearitiesofthefield-effecttransistors,becauseasdigitalcircuitstheirtransistorsalwaysoperateineitherthesaturatedorcutoffmodesandneverintheactivemode.Theirinputsare,however,sensitivetohighvoltagesgeneratedbyelectrostatic(staticelectricity)sources,andmayevenbeactivatedinto“high”(1)or“low”(0)statesbyspuriousvoltagesourcesifleftfloating. Forthisreason,itisinadvisabletoallowaCMOSlogicgateinputtofloatunderanycircumstances.PleasenotethatthisisverydifferentfromthebehaviorofaTTLgatewhereafloatinginputwassafelyinterpretedasa“high”(1)logiclevel. CMOSProblemswithFloatingInputs ThismaycauseaproblemiftheinputtoaCMOSlogicgateisdrivenbyasingle-throwswitch,whereonestatehastheinputsolidlyconnectedtoeitherVddorgroundandtheotherstatehastheinputfloating(notconnectedtoanything):      Also,thisproblemarisesifaCMOSgateinputisbeingdrivenbyanopen-collectorTTLgate.BecausesuchaTTLgate’soutputfloatswhenitgoes“high”(1),theCMOSgateinputwillbeleftinanuncertainstate:     SolutiontoFloatingInputs PullupResistors Fortunately,thereisaneasysolutiontothisdilemma,onethatisusedfrequentlyinCMOSlogiccircuitry.Wheneverasingle-throwswitch(oranyothersortofgateoutputincapableofbothsourcingandsinkingcurrent)isbeingusedtodriveaCMOSinput,aresistorconnectedtoeitherVddorgroundmaybeusedtoprovideastablelogiclevelforthestateinwhichthedrivingdevice’soutputisfloating. Thisresistor’svalueisnotcritical:10kΩisusuallysufficient.Whenusedtoprovidea“high”(1)logiclevelintheeventofafloatingsignalsource,thisresistorisknownasapullupresistor:     PulldownResistors  Whensucharesistorisusedtoprovidea“low”(0)logiclevelintheeventofafloatingsignalsource,itisknownasapulldownresistor.Again,thevalueforapulldownresistorisnotcritical:      Becauseopen-collectorTTLoutputsalwayssink,neversource,current,pullupresistorsarenecessarywheninterfacingsuchanoutputtoaCMOSgateinput:       MultiplePullupandPulldownResistors AlthoughtheCMOSgatesusedintheprecedingexampleswereallinverters(single-input),thesameprincipleofpullupandpulldownresistorsappliestomultiple-inputCMOSgates.Ofcourse,aseparatepulluporpulldownresistorwillberequiredforeachgateinput:      Thisbringsustothenextquestion:howdowedesignmultiple-inputCMOSgatessuchasAND,NAND,OR,andNOR?Notsurprisingly,theanswer(s)tothisquestionrevealasimplicityofdesignmuchlikethatoftheCMOSinverteroveritsTTLequivalent.   CMOSNANDGates Forexample,hereistheschematicdiagramforaCMOSNANDgate:     NoticehowtransistorsQ1andQ3resembletheseries-connectedcomplementarypairfromtheinvertercircuit.Botharecontrolledbythesameinputsignal(inputA),theuppertransistorturningoffandthelowertransistorturningonwhentheinputis“high”(1),andviceversa. NoticealsohowtransistorsQ2andQ4aresimilarlycontrolledbythesameinputsignal(inputB),andhowtheywillalsoexhibitthesameon/offbehaviorforthesameinputlogiclevels.Theuppertransistorsofbothpairs(Q1andQ2)havetheirsourceanddrainterminalsparalleled,whilethelowertransistors(Q3andQ4)areseries-connected. Whatthismeansisthattheoutputwillgo“high”(1)ifeithertoptransistorsaturates,andwillgo“low”(0)onlyifbothlowertransistorssaturate.   CMOSCircuitBehaviorsforAllLogicInputs ThefollowingsequenceofillustrationsshowsthebehaviorofthisNANDgateforallfourpossibilitiesofinputlogiclevels(00,01,10,and11):                   CMOSANDgate AswiththeTTLNANDgate,theCMOSNANDgatecircuitmaybeusedasthestartingpointforthecreationofanANDgate.Allthatneedstobeaddedisanotherstageoftransistorstoinverttheoutputsignal:     CMOSNORGates   ACMOSNORgatecircuitusesfourMOSFETsjustliketheNANDgate,exceptthatitstransistorsaredifferentlyarranged.Insteadoftwoparalleledsourcing(upper)transistorsconnectedtoVddandtwoseries-connectedsinking(lower)transistorsconnectedtoground,theNORgateusestwoseries-connectedsourcingtransistorsandtwoparallel-connectedsinkingtransistorslikethis:      AswiththeNANDgate,transistorsQ1andQ3workasacomplementarypair,asdotransistorsQ2andQ4.Eachpairiscontrolledbyasingleinputsignal.IfeitherinputAorinputBare“high”(1),atleastoneofthelowertransistors(Q3orQ4)willbesaturated,thusmakingtheoutput“low”(0). Onlyintheeventofbothinputsbeing“low”(0)willbothlowertransistorsbeincutoffmodeandbothuppertransistorsbesaturated,theconditionsnecessaryfortheoutputtogo“high”(1).Thisbehavior,ofcourse,definestheNORlogicfunction.   CMOSORGates TheORfunctionmaybebuiltupfromthebasicNORgatewiththeadditionofaninverterstageontheoutput:     TTLvs.CMOS:AdvantagesandDisadvantages SinceitappearsthatanygatepossibletoconstructusingTTLtechnologycanbeduplicatedinCMOS,whydothesetwo“families”oflogicdesignstillcoexist?TheansweristhatbothTTLandCMOShavetheirownuniqueadvantages. FirstandforemostonthelistofcomparisonsbetweenTTLandCMOSistheissueofpowerconsumption.Inthismeasureofperformance,CMOSistheunchallengedvictor.BecausethecomplementaryP-andN-channelMOSFETpairsofaCMOSgatecircuitare(ideally)neverconductingatthesametime,thereislittleornocurrentdrawnbythecircuitfromtheVddpowersupplyexceptforwhatcurrentisnecessarytosourcecurrenttoaload.TTL,ontheotherhand,cannotfunctionwithoutsomecurrentdrawnatalltimes,duetothebiasingrequirementsofthebipolartransistorsfromwhichitismade. Thereisacaveattothisadvantage,though.WhilethepowerdissipationofaTTLgateremainsratherconstantregardlessofitsoperatingstate(s),aCMOSgatedissipatesmorepowerasthefrequencyofitsinputsignal(s)rises.IfaCMOSgateisoperatedinastatic(unchanging)condition,itdissipateszeropower(ideally). However,CMOSgatecircuitsdrawtransientcurrentduringeveryoutputstateswitchfrom“low”to“high”andviceversa.So,themoreoftenaCMOSgateswitchesmodes,themoreoftenitwilldrawcurrentfromtheVddsupply,hencegreaterpowerdissipationatgreaterfrequencies. AdvantagesofCMOS ACMOSgatealsodrawsmuchlesscurrentfromadrivinggateoutputthanaTTLgatebecauseMOSFETsarevoltage-controlled,notcurrent-controlled,devices.ThismeansthatonegatecandrivemanymoreCMOSinputsthanTTLinputs.Themeasureofhowmanygateinputsasinglegateoutputcandriveiscalledfanout. AnotheradvantagethatCMOSgatedesignsenjoyoverTTLisamuchwiderallowablerangeofpowersupplyvoltages.WhereasTTLgatesarerestrictedtopowersupply(Vcc)voltagesbetween4.75and5.25volts,CMOSgatesaretypicallyabletooperateonanyvoltagebetween3and15volts! ThereasonbehindthisdisparityinpowersupplyvoltagesistherespectivebiasrequirementsofMOSFETversusbipolarjunctiontransistors.MOSFETsarecontrolledexclusivelybygatevoltage(withrespecttosubstrate),whereasBJTsarecurrent-controlleddevices. TTLgatecircuitresistancesarepreciselycalculatedforproperbiascurrentsassuminga5voltregulatedpowersupply.Anysignificantvariationsinthatpowersupplyvoltagewillresultinthetransistorbiascurrentsbeingincorrect,whichthenresultsinunreliable(unpredictable)operation. TheonlyeffectthatvariationsinpowersupplyvoltagehaveonaCMOSgateisthevoltagedefinitionofa“high”(1)state.ForaCMOSgateoperatingat15voltsofpowersupplyvoltage(Vdd),aninputsignalmustbecloseto15voltsinordertobeconsidered“high”(1).Thevoltagethresholdfora“low”(0)signalremainsthesame:near0volts. DisadvantagesofCMOS OnedecideddisadvantageofCMOSisslowspeed,ascomparedtoTTL.TheinputcapacitancesofaCMOSgatearemuch,muchgreaterthanthatofacomparableTTLgate—owingtotheuseofMOSFETsratherthanBJTs—andsoaCMOSgatewillbeslowertorespondtoasignaltransition(low-to-highorviceversa)thanaTTLgate,allotherfactorsbeingequal. TheRCtimeconstantformedbycircuitresistancesandtheinputcapacitanceofthegatetendtoimpedethefastrise-andfall-timesofadigitallogiclevel,therebydegradinghigh-frequencyperformance. StrategiestoCombattheDisadvantages AstrategyforminimizingthisinherentdisadvantageofCMOSgatecircuitryisto“buffer”theoutputsignalwithadditionaltransistorstages,toincreasetheoverallvoltagegainofthedevice.Thisprovidesafaster-transitioningoutputvoltage(high-to-loworlow-to-high)foraninputvoltageslowlychangingfromonelogicstatetoanother. Considerthisexample,ofan“unbuffered”NORgateversusa“buffered,”orB-series,NORgate:           Inessence,theB-seriesdesignenhancementaddstwoinverterstotheoutputofasimpleNORcircuit.Thisservesnopurposeasfarasdigitallogicisconcerned,sincetwocascadedinverterssimplycancel:     However,addingtheseinverterstagestothecircuitdoesservethepurposeofincreasingoverallvoltagegain,makingtheoutputmoresensitivetochangesininputstate,workingtoovercometheinherentslownesscausedbyCMOSgateinputcapacitance.   REVIEW: CMOSlogicgatesaremadeofIGFET(MOSFET)transistorsratherthanbipolarjunctiontransistors. CMOSgateinputsaresensitivetostaticelectricity.Theymaybedamagedbyhighvoltages,andtheymayassumeanylogiclevelifleftfloating. PullupandpulldownresistorsareusedtopreventaCMOSgateinputfromfloatingifbeingdrivenbyasignalsourcecapableonlyofsourcingorsinkingcurrent. CMOSgatesdissipatefarlesspowerthanequivalentTTLgates,buttheirpowerdissipationincreaseswithsignalfrequency,whereasthepowerdissipationofaTTLgateisapproximatelyconstantoverawiderangeofoperatingconditions. CMOSgateinputsdrawfarlesscurrentthanTTLinputs,becauseMOSFETsarevoltage-controlled,notcurrent-controlled,devices. CMOSgatesareabletooperateonamuchwiderrangeofpowersupplyvoltagesthanTTL:typically3to15voltsversus4.75to5.25voltsforTTL. CMOSgatestendtohaveamuchlowermaximumoperatingfrequencythanTTLgatesduetoinputcapacitancescausedbytheMOSFETgates. B-seriesCMOSgateshave“buffered”outputstoincreasevoltagegainfrominputtooutput,resultinginfasteroutputresponsetoinputsignalchanges.ThishelpsovercometheinherentslownessofCMOSgatesduetoMOSFETinputcapacitanceandtheRCtimeconstanttherebyengendered.   RELATEDWORKSHEETS: InsulatedGateField-EffectTransistorsWorksheet CMOSLogicGatesWorksheet TTLNORandORgates TextbookIndex Special-outputGates RelatedContent GateDriverSolutionsforFastSwitchingApplications HalfBridgeandGateDriveMeasurementsandTechniques UniversalLogicGates TheCMOSTransmissionGate CombinationalLogicCircuitDesignandSimulationUsingGates PublishedunderthetermsandconditionsoftheDesignScienceLicense Comments 0Comments Logintocomment Loadmorecomments YouMayAlsoLike Ep.45|The“IdealSwitch”?GE’sSpinoff,MenloMicro,LookstoDisruptthePowerIndustry byDanielBogdanoff ResearchersCollabWithIntel,Googleon“EnergyProcessingUnit” byArjunNijhawan UpdateonWaferFabs:Shortages,Slowdowns,andNewFacilities byBiljanaOgnenova ST’sPowerSupplyControllerAimstoBoostsEnergy-efficiencyforUSBChargers byAbdulwaliyOyekunle DronesandFiberOpticsHelpMonitorVolcanicActivity byArjunNijhawan WelcomeBack Don'thaveanAACaccount?Createonenow. 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